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<div class="title">Architectural Overview </div>  </div>
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<div class="textblock"><p>This chapter provides the architectural overview for the MCUXpresso Software Development Kit (MCUXpresso SDK). It describes each layer within the architecture and its associated components. </p>
<p><b>Overview</b> </p>
<p>The MCUXpresso SDK architecture consists of five key components listed below. </p>
<ol>
<li>
The ARM Cortex Microcontroller Software Interface Standard (CMSIS) CORE compliance device-specific header files, SOC Header, and CMSIS math/DSP libraries. </li>
<li>
Peripheral Drivers </li>
<li>
Real-time Operating Systems (RTOS) </li>
<li>
Stacks and Middleware that integrate with the MCUXpresso SDK </li>
<li>
Demo Applications based on the MCUXpresso SDK </li>
</ol>
<div class="image">
<img src="Kinetis_SDK_Block_Diagram.jpg" alt="Kinetis_SDK_Block_Diagram.jpg"/>
<div class="caption">
MCUXpresso SDK Block Diagram</div></div>
 <p><b>MCU header files</b></p>
<p>Each supported MCU device in the MCUXpresso SDK has an overall System-on Chip (SoC) memory-mapped header file. This header file contains the memory map and register base address for each peripheral and the IRQ vector table with associated vector numbers. The overall SoC header file provides a access to the peripheral registers through pointers and predefined bit masks. In addition to the overall SoC memory-mapped header file, the MCUXpresso SDK includes a feature header file for each device. The feature header file allows NXP to deliver a single software driver for a given peripheral. The feature file ensures that the driver is properly compiled for the target SOC.</p>
<p><b>CMSIS Support</b></p>
<p>Along with the SoC header files and peripheral extension header files, the MCUXpresso SDK also includes common CMSIS header files for the ARM Cortex-M core and the math and DSP libraries from the latest CMSIS release. The CMSIS DSP library source code is also included for reference.</p>
<p><b>MCUXpresso SDK Peripheral Drivers</b></p>
<p>The MCUXpresso SDK peripheral drivers mainly consist of low-level functional APIs for the MCU product family on-chip peripherals and also of high-level transactional APIs for some bus drivers/DMA driver/eDMA driver to quickly enable the peripherals and perform transfers.</p>
<p>All MCUXpresso SDK peripheral drivers only depend on the CMSIS headers, device feature files, fsl_common.h, and fsl_clock.h files so that users can easily pull selected drivers and their dependencies into projects. With the exception of the clock/power-relevant peripherals, each peripheral has its own driver. Peripheral drivers handle the peripheral clock gating/ungating inside the drivers during initialization and deinitialization respectively.</p>
<p>Low-level functional APIs provide common peripheral functionality, abstracting the hardware peripheral register accesses into a set of stateless basic functional operations. These APIs primarily focus on the control, configuration, and function of basic peripheral operations. The APIs hide the register access details and various MCU peripheral instantiation differences so that the application can be abstracted from the low-level hardware details. The API prototypes are intentionally similar to help ensure easy portability across supported MCUXpresso SDK devices. </p>
<p>Transactional APIs provide a quick method for customers to utilize higher-level functionality of the peripherals. The transactional APIs utilize interrupts and perform asynchronous operations without user intervention. Transactional APIs operate on high-level logic that requires data storage for internal operation context handling. However, the Peripheral Drivers do not allocate this memory space. Rather, the user passes in the memory to the driver for internal driver operation. Transactional APIs ensure the NVIC is enabled properly inside the drivers. The transactional APIs do not meet all customer needs, but provide a baseline for development of custom user APIs.</p>
<p>Note that the transactional drivers never disable an NVIC after use. This is due to the shared nature of interrupt vectors on devices. It is up to the user to ensure that NVIC interrupts are properly disabled after usage is complete.</p>
<p><b>Interrupt handling for transactional APIs</b></p>
<p>A double weak mechanism is introduced for drivers with transactional API. The double weak indicates two levels of weak vector entries. See the examples below:</p>
<div class="fragment"><div class="line">        PUBWEAK SPI0_IRQHandler</div>
<div class="line">        PUBWEAK SPI0_DriverIRQHandler</div>
<div class="line">SPI0_IRQHandler</div>
<div class="line">        LDR     R0, =SPI0_DriverIRQHandler</div>
<div class="line">        BX      R0</div>
</div><!-- fragment --><p>The first level of the weak implementation are the functions defined in the vector table. In the devices/&lt;DEVICE_NAME&gt;/&lt;TOOLCHAIN&gt;/startup_&lt;DEVICE_NAME&gt;.s/.S file, the implementation of the first layer weak function calls the second layer of weak function. The implementation of the second layer weak function (ex. SPI0_DriverIRQHandler) jumps to itself (B .). The MCUXpresso SDK drivers with transactional APIs provide the reimplementation of the second layer function inside of the peripheral driver. If the MCUXpresso SDK drivers with transactional APIs are linked into the image, the SPI0_DriverIRQHandler is replaced with the function implemented in the MCUXpresso SDK SPI driver.</p>
<p>The reason for implementing the double weak functions is to provide a better user experience when using the transactional APIs. For drivers with a transactional function, call the transactional APIs and the drivers complete the interrupt-driven flow. Users are not required to redefine the vector entries out of the box. At the same time, if users are not satisfied by the second layer weak function implemented in the MCUXpresso SDK drivers, users can redefine the first layer weak function and implement their own interrupt handler functions to suit their implementation.</p>
<p>The limitation of the double weak mechanism is that it cannot be used for peripherals that share the same vector entry. For this use case, redefine the first layer weak function to enable the desired peripheral interrupt functionality. For example, if the MCU’s UART0 and UART1 share the same vector entry, redefine the UART0_UART1_IRQHandler according to the use case requirements.</p>
<p><b>Feature Header Files</b></p>
<p>The peripheral drivers are designed to be reusable regardless of the peripheral functional differences from one MCU device to another. An overall Peripheral Feature Header File is provided for the MCUXpresso SDK-supported MCU device to define the features or configuration differences for each sub-family device.</p>
<p><b>Application</b></p>
<p>See the <em>Getting Started with MCUXpresso SDK</em> document (MCUXSDKGSUG). </p>
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